[PATCH] D97658: [PowerPC] Reduce symmetrical swaps for lane-insensitive vector ops

Nemanja Ivanovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Mar 8 05:21:59 PST 2021


nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.

LGTM other than a couple little nits. Thanks for implementing this.



================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:6725
+
+  if (Opc == PPC::XXPERMDIs) {
+    return isa<ConstantSDNode>(N->getOperand(1)) &&
----------------
Since the conditions are non-trivial to parse in one's head, a quick and helpful comment goes a long way:

```
// Single-operand XXPERMDI or the regular XXPERMDI/XXSLDWI where
// the immediate operand is 2.
```


================
Comment at: llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp:6789
+  // Our desired xxswap might be source of COPY_TO_REGCLASS.
+  auto SkipRCCopy = [](SDValue V) {
+    while (V->isMachineOpcode() &&
----------------
Is there not an equivalent of `lookThruCopyLike()` for SDAG?


Repository:
  rG LLVM Github Monorepo

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https://reviews.llvm.org/D97658



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