[PATCH] D98102: [RISCV] Add support for fixed vector reductions.

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck added a comment.

Wow yeah that's some heavy scalarization. I think I came across some situations where custom vector legalization may be required, as you say. It just felt odd, though. Do any other targets have to do this, other than simple hi/lo splitting?



================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2446
+  if (VecVT.isFixedLengthVector()) {
+    ContainerVT = RISCVTargetLowering::getContainerForFixedLengthVector(
+        DAG, VecVT, Subtarget);
----------------
This (and further down) can now be simplified to `= getContainerForFixedLengthVector(VecVT);` (after rebasing)


Repository:
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  https://reviews.llvm.org/D98102/new/

https://reviews.llvm.org/D98102