[PATCH] D98011: [X86] Adding one flag to imply whether the instruction should check the predicate when compress EVEX instructions to VEX encoding.

LiuChen via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Mar 7 19:28:48 PST 2021


LiuChen3 updated this revision to Diff 328922.
LiuChen3 added a comment.

Rebase and address Pengfei and Craig's comments.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D98011/new/

https://reviews.llvm.org/D98011

Files:
  llvm/lib/Target/X86/X86EvexToVex.cpp
  llvm/lib/Target/X86/X86InstrFormats.td
  llvm/lib/Target/X86/X86InstrSSE.td
  llvm/utils/TableGen/X86EVEX2VEXTablesEmitter.cpp

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