[PATCH] D98101: [RISCV] Enable the LocalStackSlotAllocation pass support

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVRegisterInfo.cpp:291
+  // For RISC-V, The machine instructions that include a FrameIndex operand
+  // are load/store(exclude vector load/store), ADDI instructions.
+  if (!MI->mayLoad() && !MI->mayStore() && !(MI->getOpcode() == RISCV::ADDI))
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I think vector load/store can have a frameindex operand. There's no immediate field so it will get split out into an ADDI in eliminateFrameIndex, but I think that happens later.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D98101/new/

https://reviews.llvm.org/D98101