[PATCH] D97732: [AArch64][GlobalISel] Enable use of the optsize predicate in the selector.
Amara Emerson via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Mar 1 13:51:43 PST 2021
aemerson created this revision.
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To do this while supporting the existing functionality in SelectionDAG of using PGO info, we add the ProfileSummaryInfo and LazyBlockFrequencyInfo analysis dependencies to the instruction selector pass.
Then, use the predicate to generate constant pool loads for f32 materialization, if we're targeting optsize/minsize.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D97732
Files:
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelect.h
llvm/include/llvm/CodeGen/GlobalISel/InstructionSelector.h
llvm/include/llvm/CodeGen/GlobalISel/Utils.h
llvm/lib/CodeGen/GlobalISel/InstructionSelect.cpp
llvm/lib/CodeGen/GlobalISel/Utils.cpp
llvm/lib/Target/AArch64/AArch64TargetMachine.cpp
llvm/lib/Target/AArch64/GISel/AArch64InstructionSelector.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp
llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.h
llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
llvm/lib/Target/ARM/ARMTargetMachine.cpp
llvm/lib/Target/Mips/MipsTargetMachine.cpp
llvm/lib/Target/PowerPC/PPCTargetMachine.cpp
llvm/lib/Target/RISCV/RISCVTargetMachine.cpp
llvm/lib/Target/X86/X86TargetMachine.cpp
llvm/test/CodeGen/AArch64/GlobalISel/gisel-commandline-option.ll
llvm/test/CodeGen/AArch64/GlobalISel/select-imm.mir
llvm/test/CodeGen/AArch64/O0-pipeline.ll
llvm/utils/TableGen/GlobalISelEmitter.cpp
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