[PATCH] D97909: [AIX] Allow safe for 32bit P8 VSX pattern matching

[Sean Fertile via Phabricator via llvm-commits]

sfertile added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCInstrVSX.td:3170
           (f32 (XSCVSPDPN (XXSLDWI $S, $S, 3)))>;
 def : Pat<(f32 (vector_extract v4f32:$S, i64:$Idx)),
           (f32 VectorExtractions.BE_VARIABLE_FLOAT)>;
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This pattern should be moved to an IsPPC64 block.


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Comment at: llvm/test/CodeGen/PowerPC/aix-p8-scalar_vector_conversions.ll:2
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc < %s -mtriple=powerpc64-ibm-aix-xcoff -verify-machineinstrs \
+; RUN:          -mcpu=pwr8 -vec-extabi | FileCheck %s --check-prefix=AIX64
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I think we should have the ppc64 test in `p8-scalar_vector_conversions.ll` since it is essentially the same as the BE results in there but without the descriptive register names. Then rename this file staring with `aix32`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97909/new/

https://reviews.llvm.org/D97909