[PATCH] D95363: [SVE][LoopVectorize] Add support for scalable vectorization of loops with vector reverse

[Caroline via Phabricator via llvm-commits]

CarolineConcatto added inline comments.


================
Comment at: llvm/test/Transforms/LoopVectorize/AArch64/sve-vector-reverse.ll:14
+
+define void @vector_reverse_double(i32 %N, double* nocapture %a, double* nocapture readonly %b) #0{
+; CHECK-LABEL: @vector_reverse_double
----------------
david-arm wrote:
> If you use a i64 variable here then it makes the tests simpler as the variable doesn't need sign-extending with `sext`
Hi @david-arm I
 think I forgot to answer that suggestion.

This file has 2 tests, for 2 variable types, double and  integer variables

```
@vector_reverse_f64(i64 %N, double* %a, double* %b)
 @vector_reverse_i64(i64 %N, i64* %a, i64* %b) 
```

So I believe it is ok to leave this as it is. Unless I am missing something. (Which is completely ok for me)
I can see for @vector_reverse_i64 that sext instruction is gone.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95363/new/

https://reviews.llvm.org/D95363