[PATCH] D97948: [AIX][TLS] Generate 32-bit general-dynamic access code sequence
Nemanja Ivanovic via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 4 19:40:21 PST 2021
nemanjai accepted this revision.
nemanjai added a comment.
This revision is now accepted and ready to land.
LGTM other than the minor nits.
================
Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:815
+ // For TLS access on AIX, we have two TOC entries for the symbol (one for
+ // the offset and the other for the region handle). They are differentiated
----------------
Minor nit: since this comment is already in the lambda, we don't really need it at the call sites (here and below).
================
Comment at: llvm/lib/Target/PowerPC/PPCAsmPrinter.cpp:2333
break;
+ case PPC::GETtlsADDR32AIX: {
+ MCSymbol *TlsGetAddr = OutContext.getOrCreateSymbol(".__tls_get_addr");
----------------
```
// The reference to .__tls_get_addr is unknown to the assembler
// so we need to emit an external symbol reference.
```
================
Comment at: llvm/test/CodeGen/PowerPC/aix-tls-gd-double.ll:1
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
+; RUN: llc -verify-machineinstrs -mcpu=pwr7 -mattr=-altivec \
----------------
Nit: can you please produce the test cases with `-O2` or at least run `mem2reg` on them. The stores of the arguments on the stack detract from the readability of the tests.
Repository:
rG LLVM Github Monorepo
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https://reviews.llvm.org/D97948/new/
https://reviews.llvm.org/D97948
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