[PATCH] D97948: [AIX][TLS] Generate 32-bit general-dynamic access code sequence
David Tenty via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Mar 4 15:21:31 PST 2021
daltenty added inline comments.
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:3141
+
+ // The general-dynamic model is the only access model supportd for now, so
+ // all the GLobalTLSAddress nodes are lowered with this model.
----------------
nit: typo
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:3142
+ // The general-dynamic model is the only access model supportd for now, so
+ // all the GLobalTLSAddress nodes are lowered with this model.
+ // We need to generate two TOC entries, one for the variable offset, one for
----------------
nit: typo
================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.h:360
+ /// G8RC = TLSGD_AIX, TOC_ENTRY, TOC_ENTRY
+ /// Op that combines two rgister copies of TOC entries
+ /// (region handle into R3 and variable offset into R4) followed by a
----------------
nit: typo
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97948/new/
https://reviews.llvm.org/D97948
More information about the llvm-commits
mailing list