[PATCH] D97609: [RISCV] Add support for VECTOR_REVERSE for scalable vector types.

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


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Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:1496
+    // (0, 1,..., VLMAX-2, VLMAX-1) -> (VLMAX-1, VLMAX-2,..., 1, 0).
+    // FIXME: This implementation doesn't work for vectors of more than 256
+    // elements for SEW==8.
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frasercrmck wrote:
> I suppose we'll have to promote to i16 for this case?
Yeah, but we don't really have a good way of know if it is needed without just always doing it or deciding based on whether -riscv-vector-bits-max is set and what its value is?

We also can't promote to i16 without splitting for lmul=8.


Repository:
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  https://reviews.llvm.org/D97609/new/

https://reviews.llvm.org/D97609