[PATCH] D97961: [Cost]Canonicalize the cost for logical or/and reductions.

[David Sherwood via Phabricator via llvm-commits]

david-arm added inline comments.


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Comment at: llvm/include/llvm/CodeGen/BasicTTIImpl.h:1902
+      // Or reduction for i1 is represented as:
+      // %val = bitcast <ReduxWidth x i1> to iReduxWidth
+      // %res = cmp ne iReduxWidth %val, 0
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I'm not sure this is always true because some backends (e.g. AArch64) promote i1 to larger integers. The costs for AArch64 still look a bit odd to be honest. I tried them out manually and I observe about 8 instructions for AND reductions using <4 x i1> vectors since we have lots of bytewise moves of -1 into the vector lanes of a <4 x i32> vector.


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  https://reviews.llvm.org/D97961/new/

https://reviews.llvm.org/D97961