[PATCH] D97127: [AVR] Improve 8/16 bit atomic operations

[Ben Shi via Phabricator via llvm-commits]

benshi001 added a comment.

In D97127#2603227 <https://reviews.llvm.org/D97127#2603227>, @aykevl wrote:

> In D97127#2602032 <https://reviews.llvm.org/D97127#2602032>, @benshi001 wrote:
>
>> In D97127#2600159 <https://reviews.llvm.org/D97127#2600159>, @aykevl wrote:
>>
>>> In D97127#2593329 <https://reviews.llvm.org/D97127#2593329>, @benshi001 wrote:
>>>
>>>> Do we need a test case to show the right AVR assembly ? Or at least shows that the points `#1` and `#2` in your comment are fixed.
>>>
>>> I think that would imply using hardcoded registers in the test. Is that what you mean?
>>
>> No. I meant, you have shown a case `void atomicadd(_Atomic char *val)` and corresponding assembly, and I would like to see the change of the generated assembly by your patch, and wonder if the change can be added as a test case.
>
> There are tests in llvm/test/CodeGen/AVR/atomics/load8.ll for example. However while the assembly has changed, patterns like `[[RR:r[0-9]+]]` are used so the test does not change. Therefore, I think the only way to show the bug is fixed is by hardcoding registers.
> Or do you see another way?

I see. There is no need to do so.


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