[PATCH] D96394: [AVR] Improve inline assembly

Thu Mar 4 04:53:43 PST 2021

benshi001 added a comment.

In D96394#2602966 <https://reviews.llvm.org/D96394#2602966>, @aykevl wrote:

> Oh, I missed this comment.
>
> In D96394#2553152 <https://reviews.llvm.org/D96394#2553152>, @benshi001 wrote:
>
>> Though i32/i64 types are not supported currently, the inline asm for i8/i16 of llvm-avr
>> get full comtability with avr-gcc by my patch.
>>
>> I will try to fix i32/i64 failure in inline-asm in the future.
>
> What should `i32`/`i64` do? AVR only has registers up to 16 bits.

My final goal is make avr-llvm generates all the same assembly as avr-gcc does. Although `d` implies 8-bit, avr-gcc generate all correct code for all types.

Before my patch, only 8-bit `d` is correct, and after my patch, 8-16-bit are all correct. And I expect to fix 32-64-bit in a future patch.

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  https://reviews.llvm.org/D96394/new/

https://reviews.llvm.org/D96394