[PATCH] D97891: Revert "[MC] Remove PhysRegSize from MCRegisterClass"

Bjorn Pettersson via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Thu Mar 4 00:22:38 PST 2021


bjope added a comment.

If you need this I'd rather "add the needed support" than doing it as a revert (although nice to get the history here in the review). To be more specific; I would let RegisterInfoEmitter provide the size in bits rather than the mystierious "/8" that for example results in a 1-bit register being reported as having size 0. And I'd get rid of the redundant "getSize()" method. And the change to the code comment in TargetInstrInfo::getStackSlotRange could probably be skipped.

With this patch the RegSize is set to zero for "non simple" classes (those with multiple HW modes). That would need to be documented somehow (although I guess it limits how the size information can be used, as it will be missing for some register classes).

It would be nice if you could describe a bit more about how Bolt is using this information to understand if there is any alternative solutions. And to understand why/if it is OK to not getting the information for classes with several HW modes etc.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D97891/new/

https://reviews.llvm.org/D97891



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