[llvm] 90b7825 - [LegalizeVectorTypes] Remove a tautological compare.

[Craig Topper via llvm-commits]

Author: Craig Topper
Date: 2021-03-03T23:26:00-08:00
New Revision: 90b782559860c4df9c79cb38066adbb4167293f3

URL: https://github.com/llvm/llvm-project/commit/90b782559860c4df9c79cb38066adbb4167293f3
DIFF: https://github.com/llvm/llvm-project/commit/90b782559860c4df9c79cb38066adbb4167293f3.diff

LOG: [LegalizeVectorTypes] Remove a tautological compare.

Added: 
    

Modified: 
    llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp

Removed: 
    


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diff  --git a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
index f70406416347..2fca0f386627 100644
--- a/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
+++ b/llvm/lib/CodeGen/SelectionDAG/LegalizeVectorTypes.cpp
@@ -1268,7 +1268,7 @@ void DAGTypeLegalizer::SplitVecRes_INSERT_SUBVECTOR(SDNode *N, SDValue &Lo,
   // vector, and insert into the lower half of the split vector directly.
   // Similarly if the subvector is fully in the high half.
   unsigned IdxVal = cast<ConstantSDNode>(Idx)->getZExtValue();
-  if (IdxVal >= 0 && IdxVal + SubElems <= LoElems) {
+  if (IdxVal + SubElems <= LoElems) {
     Lo = DAG.getNode(ISD::INSERT_SUBVECTOR, dl, LoVT, Lo, SubVec, Idx);
     return;
   }