[PATCH] D96351: [AIX] Enable the default AltiVec ABI on AIX

[Sean Fertile via Phabricator via llvm-commits]

sfertile added inline comments.


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Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:15161
   }
+//FIXME: This warning should ideally emitted in the front end.
+  const auto &TM = getTargetMachine();
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hubert.reinterpretcast wrote:
> 
I don't see this update.


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Comment at: llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp:348
+
+      markSuperRegs(Reserved, CSR_Altivec_SaveList[I]);
+    }
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ZarkoCA wrote:
> nemanjai wrote:
> > Since this effectively shrinks the register class by 12 registers, it is worth double checking that marking these registers as reserved without providing an alternate allocation order does not adversely affect register pressure estimates.
> Is the way to test this to check the number of spills we get when using the different Altivec ABIs? In the test case `all_fprs_and_vecregs` I just added in `llvm/test/CodeGen/PowerPC/aix-csr-vector.ll` I didn't notice a difference in the number of registers spills.  Would adding a check for that be sufficient? 
This comment made me realize we need to update `PPCRegisterInfo::getRegPressureLimit`


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  https://reviews.llvm.org/D96351/new/

https://reviews.llvm.org/D96351