[PATCH] D96405: [DAGCombiner] Improve reduceBuildVecToShuffle Performance
Michael Marjieh via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Mar 3 01:46:09 PST 2021
mmarjieh added a comment.
In D96405#2565621 <https://reviews.llvm.org/D96405#2565621>, @lebedev.ri wrote:
> This doesn't seem like the right direction,
> i'd expect that to be a new fold to reduce shuffle count,
> because if we only teach some existing fold to do this,
> we'll miss such shuffle patterns that appear via other means.
Agreed.
I added a separate combine for this.
I am still not sure what is the best DAGCombine Level to run this combine.
Currently, I run it after LegalizeDAG.
I would like to receive advice from you on when to run it.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D96405/new/
https://reviews.llvm.org/D96405
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