[llvm] 72d4a41 - [PowerPC] Allow spilling GPR to VSR on AIX
Qiu Chaofan via llvm-commits
llvm-commits at lists.llvm.org
Tue Mar 2 21:34:17 PST 2021
Author: Qiu Chaofan
Date: 2021-03-03T13:32:39+08:00
New Revision: 72d4a41ba622bd3a653db2cd9bf314ad83caf032
URL: https://github.com/llvm/llvm-project/commit/72d4a41ba622bd3a653db2cd9bf314ad83caf032
DIFF: https://github.com/llvm/llvm-project/commit/72d4a41ba622bd3a653db2cd9bf314ad83caf032.diff
LOG: [PowerPC] Allow spilling GPR to VSR on AIX
This patch enables spilling GPR to VSRs instead of stack under AIX ABI.
Reviewed By: nemanjai
Differential Revision: https://reviews.llvm.org/D97367
Added:
Modified:
llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
Removed:
################################################################################
diff --git a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
index 178a13443e2a..76b1cfe40ad2 100644
--- a/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
+++ b/llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
@@ -452,7 +452,7 @@ PPCRegisterInfo::getLargestLegalSuperClass(const TargetRegisterClass *RC,
// For Power9 we allow the user to enable GPR to vector spills.
// FIXME: Currently limited to spilling GP8RC. A follow on patch will add
// support to spill GPRC.
- if (TM.isELFv2ABI()) {
+ if (TM.isELFv2ABI() || Subtarget.isAIXABI()) {
if (Subtarget.hasP9Vector() && EnableGPRToVecSpills &&
RC == &PPC::G8RCRegClass) {
InflateGP8RC++;
diff --git a/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll b/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
index a4f172322eda..396a7e6c065a 100644
--- a/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
+++ b/llvm/test/CodeGen/PowerPC/gpr-vsr-spill.ll
@@ -1,4 +1,6 @@
; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64le-unknown-linux-gnu -ppc-enable-gpr-to-vsr-spills < %s | FileCheck %s
+; RUN: llc -verify-machineinstrs -mcpu=pwr9 -mtriple=powerpc64-ibm-aix-xcoff -ppc-enable-gpr-to-vsr-spills -vec-extabi < %s | FileCheck %s
+
define signext i32 @foo(i32 signext %a, i32 signext %b) {
entry:
%cmp = icmp slt i32 %a, %b
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