[PATCH] D97828: [LoopInterchange] Disallow interchange when memory accesses are guarded by control flow

[Ta-Wei Tu via Phabricator via llvm-commits]

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If instructions that have side effects are guarded by control flow, 
the order of execution might differ after interchanging the loops
and results in incorrect behaviour (the branch condition may depends
on the execution order).

This fixes https://bugs.llvm.org/show_bug.cgi?id=48057


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97828

Files:
  llvm/lib/Transforms/Scalar/LoopInterchange.cpp
  llvm/test/Transforms/LoopInterchange/pr48057.ll

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