[llvm] 1e46b6f - [test] Fix CodeGen/VE/Scalar tests

[Fangrui Song via llvm-commits]

Author: Fangrui Song
Date: 2021-03-02T15:30:44-08:00
New Revision: 1e46b6f4012399a2fef5fbbb4ed06fc919835414

URL: https://github.com/llvm/llvm-project/commit/1e46b6f4012399a2fef5fbbb4ed06fc919835414
DIFF: https://github.com/llvm/llvm-project/commit/1e46b6f4012399a2fef5fbbb4ed06fc919835414.diff

LOG: [test] Fix CodeGen/VE/Scalar tests

Added: 
    

Modified: 
    llvm/test/CodeGen/VE/Scalar/bitreverse.ll
    llvm/test/CodeGen/VE/Scalar/rem.ll

Removed: 
    


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diff  --git a/llvm/test/CodeGen/VE/Scalar/bitreverse.ll b/llvm/test/CodeGen/VE/Scalar/bitreverse.ll
index 208c207ff513..cceca6824adb 100644
--- a/llvm/test/CodeGen/VE/Scalar/bitreverse.ll
+++ b/llvm/test/CodeGen/VE/Scalar/bitreverse.ll
@@ -49,9 +49,9 @@ define zeroext i32 @func32z(i32 zeroext %p) {
 define signext i16 @func16s(i16 signext %p) {
 ; CHECK-LABEL: func16s:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    brv %s0, %s0
-; CHECK-NEXT:    sra.l %s0, %s0, 48
-; CHECK-NEXT:    b.l.t (, %s10)
+; CHECK-NEXT:    bswp %s0, %s0, 1
+; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    srl %s1, %s0, 12
   %r = tail call i16 @llvm.bitreverse.i16(i16 %p)
   ret i16 %r
 }
@@ -59,9 +59,9 @@ define signext i16 @func16s(i16 signext %p) {
 define zeroext i16 @func16z(i16 zeroext %p) {
 ; CHECK-LABEL: func16z:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    brv %s0, %s0
-; CHECK-NEXT:    srl %s0, %s0, 48
-; CHECK-NEXT:    b.l.t (, %s10)
+; CHECK-NEXT:    bswp %s0, %s0, 1
+; CHECK-NEXT:    and %s0, %s0, (32)0
+; CHECK-NEXT:    srl %s1, %s0, 12
   %r = tail call i16 @llvm.bitreverse.i16(i16 %p)
   ret i16 %r
 }
@@ -69,9 +69,6 @@ define zeroext i16 @func16z(i16 zeroext %p) {
 define signext i8 @func8s(i8 signext %p) {
 ; CHECK-LABEL: func8s:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    brv %s0, %s0
-; CHECK-NEXT:    sra.l %s0, %s0, 56
-; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i8 @llvm.bitreverse.i8(i8 %p)
   ret i8 %r
 }
@@ -79,9 +76,6 @@ define signext i8 @func8s(i8 signext %p) {
 define zeroext i8 @func8z(i8 zeroext %p) {
 ; CHECK-LABEL: func8z:
 ; CHECK:       # %bb.0:
-; CHECK-NEXT:    brv %s0, %s0
-; CHECK-NEXT:    srl %s0, %s0, 56
-; CHECK-NEXT:    b.l.t (, %s10)
   %r = tail call i8 @llvm.bitreverse.i8(i8 %p)
   ret i8 %r
 }

diff  --git a/llvm/test/CodeGen/VE/Scalar/rem.ll b/llvm/test/CodeGen/VE/Scalar/rem.ll
index 771a26acd743..e4b7f9e94fca 100644
--- a/llvm/test/CodeGen/VE/Scalar/rem.ll
+++ b/llvm/test/CodeGen/VE/Scalar/rem.ll
@@ -83,8 +83,7 @@ define signext i16 @remi16(i16 signext %a, i16 signext %b) {
 ; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
 ; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
 ; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
-; CHECK-NEXT:    sll %s0, %s0, 48
-; CHECK-NEXT:    sra.l %s0, %s0, 48
+; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
 ; CHECK-NEXT:    b.l.t (, %s10)
   %a32 = sext i16 %a to i32
   %b32 = sext i16 %b to i32
@@ -113,8 +112,7 @@ define signext i8 @remi8(i8 signext %a, i8 signext %b) {
 ; CHECK-NEXT:    divs.w.sx %s2, %s0, %s1
 ; CHECK-NEXT:    muls.w.sx %s1, %s2, %s1
 ; CHECK-NEXT:    subs.w.sx %s0, %s0, %s1
-; CHECK-NEXT:    sll %s0, %s0, 56
-; CHECK-NEXT:    sra.l %s0, %s0, 56
+; CHECK-NEXT:    adds.w.sx %s0, %s0, (0)1
 ; CHECK-NEXT:    b.l.t (, %s10)
   %a32 = sext i8 %a to i32
   %b32 = sext i8 %b to i32