[PATCH] D97730: [SDAG] allow vector types for select->logic folds

[Sanjay Patel via Phabricator via llvm-commits]

spatel created this revision.
spatel added reviewers: dmgreen, pengfei, aqjune, RKSimon.
Herald added subscribers: ecnelises, hiraditya, mcrosier.
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Herald added a project: LLVM.

This prepares codegen for a change that will remove the identical folds from IR because they are not poison-safe. See D93065 <https://reviews.llvm.org/D93065> / D97360 <https://reviews.llvm.org/D97360> for details.

We already generically support scalar types, and there are various target-specific transforms that overlap the vector folds. For example, x86 recognizes the `and` patterns, but not `or`. We can end up with 1 extra instruction there, but I think that is still preferred over the `blendv` alternative that loads a constant vector.

Removing custom code can be a follow-up change.


https://reviews.llvm.org/D97730

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/select-with-and-or.ll
  llvm/test/CodeGen/X86/select-with-and-or.ll

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