[PATCH] D97559: [RISCV] Support INSERT_SUBVECTOR on vector masks

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck marked 3 inline comments as done.
frasercrmck added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVISelLowering.cpp:2583
+  // required.
+  if (VecVT != Op.getSimpleValueType())
+    Slideup = DAG.getBitcast(Op.getSimpleValueType(), Slideup);
----------------
craig.topper wrote:
> You can call getBitcast unconditionally.
Yep, did so prior to merging. Cheers.


================
Comment at: llvm/test/CodeGen/RISCV/rvv/fixed-vectors-insert-subvector.ll:396
+
+; FIXME: SplitVecRes_INSERT_SUBVECTOR crashes on this one when trying to spill
+; to the stack.
----------------
craig.topper wrote:
> craig.topper wrote:
> > I'm working on a fix for this.
> https://reviews.llvm.org/D97582 should fix this. Before the introduction of experimental.vector.insert there was almost no way to create an INSERT_SUBVECTOR until after type legalization so the code wasn't well exercised.
Thanks. Now that this was merged you can hopefully enable this as your test case.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97559/new/

https://reviews.llvm.org/D97559