[PATCH] D88389: [M68k] (Patch 3/8) Basic infrastructures and target description files

[Min-Yih Hsu via Phabricator via llvm-commits]

myhsu added inline comments.


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Comment at: llvm/lib/Target/M68k/M68kInstrFormats.td:180
+/// If the EA is a direct register mode, bits 4 and 5 are 0, and the register
+/// number will be encoded in bit 0 - 3. Since the first register's
+/// (A0) register number is 8, we can easily tell data registers from
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jrtc27 wrote:
> I do think this needs to say _address_ register; the first register is D0 with encoding 0, no?
yes you're right, "address" is missing


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https://reviews.llvm.org/D88389