[PATCH] D97658: [PowerPC] Reduce symmetrical swaps for lane-insensitive vector ops

[Qiu Chaofan via Phabricator via llvm-commits]

qiucf created this revision.
qiucf added reviewers: nemanjai, PowerPC, steven.zhang, jsji.
Herald added subscribers: shchenz, kbarton, hiraditya.
qiucf requested review of this revision.
Herald added a project: LLVM.
Herald added a subscriber: llvm-commits.

This patch simplifies pattern `(xxswap (vec-op (xxswap a) (xxswap b)))` into `(vec-op a b)` if `vec-op` is lane-insensitive. The motivating case is `ScalarToVector-VecOp-ExtractElement` sequence on LE, but the peephole itself is not related to endianness, so BE may also benefit from this.

The changed case is diffed for easier review. Remove that part when applying this patch.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97658

Files:
  llvm/lib/Target/PowerPC/PPCISelDAGToDAG.cpp
  llvm/test/CodeGen/PowerPC/swap-reduction.ll

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