[PATCH] D97631: [DAGCombiner] Teach visitUMULO that a 1-bit UMULO can't overflow.

[Craig Topper via Phabricator via llvm-commits]

craig.topper abandoned this revision.
craig.topper added a comment.

A better fix is to just not early out if the N1 doesn't have any zero bits. That will also handle the case that we know nothing about operand 1, but operand 0 is known to be 0 or 1.


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  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D97631/new/

https://reviews.llvm.org/D97631