[PATCH] D97628: GlobalISel: Merge and cleanup more AMDGPU call lowering code

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Feb 28 07:28:19 PST 2021


arsenm created this revision.
arsenm added reviewers: aemerson, paquette, aditya_nandakumar, dsanders, bogner.
Herald added subscribers: kerbowa, hiraditya, kristof.beyls, t-tye, tpr, dstuttard, rovka, yaxunl, nhaehnle, jvesely, kzhuravl.
arsenm requested review of this revision.
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Herald added a project: LLVM.

This merges more AMDGPU ABI lowering code into the generic call
lowering. Start cleaning up by factoring away more of the pack/unpack
logic into the buildCopy{To|From}Parts functions. These could use more
improvement, and the SelectionDAG versions are significantly more
complex, and we'll eventually have to emulate all of those cases too.

      

This is mostly NFC, but does result in some minor instruction
reordering. It also removes some of the limitations with mismatched
sizes the old code had. However, similarly to the merge on the input,
this is forcing gfx6/gfx7 to use the gfx8+ ABI (which is what we
actually want, but SelectionDAG is stuck using the weird emergent
ABI).

      

This also changes the load/store size for stack passed EVTs for
AArch64, which makes it consistent with the DAG behavior.


https://reviews.llvm.org/D97628

Files:
  llvm/lib/CodeGen/GlobalISel/CallLowering.cpp
  llvm/lib/Target/AMDGPU/AMDGPUCallLowering.cpp
  llvm/test/CodeGen/AArch64/GlobalISel/arm64-callingconv.ll
  llvm/test/CodeGen/AArch64/GlobalISel/call-lowering-vectors.ll
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-arguments.ll
  llvm/test/CodeGen/AArch64/GlobalISel/irtranslator-stack-evt-bug47619.ll
  llvm/test/CodeGen/AArch64/GlobalISel/legalize-s128-div.mir
  llvm/test/CodeGen/AArch64/GlobalISel/ret-1x-vec.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/andn2.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ashr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/bswap.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/dummy-target.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fdiv.f16.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fma.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/fpow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call-non-fixed.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-call.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/irtranslator-function-args.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/lshr.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/orn2.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/roundeven.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/shl.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/uaddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/usubsat.ll
  llvm/unittests/CodeGen/GlobalISel/LegalizerHelperTest.cpp

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