[PATCH] D97111: [RISCV] change rvv frame layout

luxufan via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 27 22:15:11 PST 2021


StephenFan updated this revision to Diff 326949.
StephenFan added a comment.

delete unnecessary white space


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97111/new/

https://reviews.llvm.org/D97111

Files:
  llvm/lib/Target/RISCV/RISCVFrameLowering.cpp
  llvm/lib/Target/RISCV/RISCVFrameLowering.h
  llvm/lib/Target/RISCV/RISCVMachineFunctionInfo.h
  llvm/test/CodeGen/RISCV/rvv/access-fixed-objects-by-rvv.ll
  llvm/test/CodeGen/RISCV/rvv/allocate-lmul-2-4-8.ll
  llvm/test/CodeGen/RISCV/rvv/localvar.ll
  llvm/test/CodeGen/RISCV/rvv/memory-args.ll
  llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector-csr.ll
  llvm/test/CodeGen/RISCV/rvv/rv32-spill-vector.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector-csr.ll
  llvm/test/CodeGen/RISCV/rvv/rv64-spill-vector.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D97111.326949.patch
Type: text/x-patch
Size: 50612 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210228/2bfc1692/attachment.bin>


More information about the llvm-commits mailing list