[PATCH] D97624: [X86] Improve SMULO/UMULO codegen for vXi8 vectors.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sat Feb 27 22:02:35 PST 2021


craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel.
Herald added subscribers: pengfei, hiraditya.
craig.topper requested review of this revision.
Herald added a project: LLVM.

The default expansion creates a MUL and either a MULHS/MULHU. Each
of those separately expand to sequences that use one or more
PMULLW instructions as well as additional instructions to
extend the types to vXi16. The MULHS/MULHU expansion computes the
whole 16-bit product, but only keeps the high part.

We can improve the lowering of SMULO/UMULO by using the MULHS/MULHU
expansion, but keep both the high and low parts. And we can use
those parts to calculate the overflow.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97624

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/vec_smulo.ll
  llvm/test/CodeGen/X86/vec_umulo.ll

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