[PATCH] D97453: [X86] Allow PTILEZEROV and PTILELOADDV to be rematerializable

Sat Feb 27 04:14:47 PST 2021

pengfei added inline comments.

================
Comment at: llvm/lib/Target/X86/X86InstrInfo.cpp:1010
+  case X86::PTILEZEROV:
+  case X86::PTILELOADDV:
     return true;
----------------
LuoYuanke wrote:
> LuoYuanke wrote:
> > Sorry. I just noticed the ptileloaddv is also rematerialized. I'm not sure about it, because we need the stride (encoded as index)  information and we need also make sure the memory address is global variable. What do you think?
> We may need to make sure the memory is not modified before reload. Constant pool should be ok.
I did a research and found it has difficulties:
The PTILELOADDV doesn't have a MachineMemOperand like other load MIs, so we cannot analyze the memory through it.
I also checked the other load MIs' rematerializion, and found they only do it for RIP based (which AMX doesn't support) addressing and PIC. I guess these represent the handling of constant pool.
Finally, I think loading form constant pool is rare for AMX. So I think we cound just disable the rematerializion for ptileloaddv. What do you think?

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  https://reviews.llvm.org/D97453/new/

https://reviews.llvm.org/D97453