[PATCH] D97104: [lld-macho] Add test for a variety of arm64 relocations

[Shoaib Meenai via Phabricator via llvm-commits]

smeenai accepted this revision.
smeenai added a comment.
This revision is now accepted and ready to land.

LGTM



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Comment at: lld/test/MachO/arm64-relocs.s:13
+# CHECK-LABEL: _foo:
+# CHECK-NEXT:  bl	0x[[#BAR+120]]
+# CHECK-NEXT:  adrp	x2, [[#]] ; 0x[[#BAZ+4096-128]]
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I imagine it's changing from 123 to 120 because the instruction (and presumably the relocation type) can only encode 4-byte aligned addresses, but can you add a comment explaining that?


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Comment at: lld/test/MachO/arm64-relocs.s:14
+# CHECK-NEXT:  bl	0x[[#BAR+120]]
+# CHECK-NEXT:  adrp	x2, [[#]] ; 0x[[#BAZ+4096-128]]
+# CHECK-NEXT:  ldr	x2, [x2, #128]
----------------
Same here.


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Comment at: lld/test/MachO/arm64-relocs.s:45
+## These generate ARM64_RELOC_UNSIGNED symbol relocations
+## XXX: how to generate UNSIGNED section relocations?
+_ptr_1:
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Do local symbols (as in symbols prefixed with `L`) do the trick?


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  https://reviews.llvm.org/D97104/new/

https://reviews.llvm.org/D97104