[PATCH] D97485: PowerPC][AIX] Handle variadic vector formal arguments.

Zarko Todorovski via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Feb 26 13:20:27 PST 2021


ZarkoCA added inline comments.


================
Comment at: llvm/lib/Target/PowerPC/PPCCCState.h:41
+
+class AIXCCState : public CCState {
+private:
----------------
Looks like this class was created only to determine whether an argument is fixed? That said, to me this feels like the cleanest way to do this. 


================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6266
+// Returns true when the shadow of a general purpose argument register
+// in the paramter save area is aligned to at least 'RequiredAlign'.
+static bool isGPRShadowAligned(MCPhysReg Reg, Align RequiredAlign) {
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6269
+  assert(RequiredAlign.value() <= 16 &&
+         "Required aligment greater than stack alignment.");
+  switch (Reg) {
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6455-6456
+    unsigned NextRegIndex = State.getFirstUnallocated(GPRs);
+    // Burn any underaligned registers and their shadowed stack space untill
+    // we reach the required alignment.
+    while (NextRegIndex != GPRs.size() &&
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6469
+    // They are passed in VRs if any are available (unlike arguments passed
+    // through elipsees) and shadow GPRs (unlike arguments to non-vaaarg
+    // functions)
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6494
+    // Corner case for 32-bit codegen. We have 2 registers to pass the first
+    // half of the argument, and then need to pass the remamining half on the
+    // stack.
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6510
+
+    // We have enough gprs to fully pass the vector argument, and we have
+    // already consumed any underaligned registers. Start with the custom
----------------



================
Comment at: llvm/lib/Target/PowerPC/PPCISelLowering.cpp:6698-6699
+
+    // Vector arguments to VaArg functions are passed both on the stack, and
+    // in any available gprs. Load the value from the stack and add the gprs
+    // as live ins.
----------------



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  https://reviews.llvm.org/D97485/new/

https://reviews.llvm.org/D97485



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