[PATCH] D97435: [Aarch64] Correct register class for pseudo instructions

[Tim Northover via Phabricator via llvm-commits]

t.p.northover accepted this revision.
t.p.northover added a comment.
This revision is now accepted and ready to land.

Looks reasonable to me. If you were really keen you could probably write a MIR test (it complains loudly when an instruction has the wrong regclass), but in reality I think it's unlikely to matter. This isn't exactly a high-traffic part of the backend.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97435/new/

https://reviews.llvm.org/D97435