[PATCH] D97392: [amdgpu] Atomic should be source of divergence.

[Jay Foad via Phabricator via llvm-commits]

foad added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIISelLowering.cpp:11854
         cast<ConstantSDNode>(N->getOperand(1))->getZExtValue());
+  case ISD::ATOMIC_CMP_SWAP:
+  case ISD::ATOMIC_CMP_SWAP_WITH_SUCCESS:
----------------
foad wrote:
> arsenm wrote:
> > foad wrote:
> > > Would it make sense to handle these generic nodes in a new TargetLowering::isSDNodeSourceOfDivergence so that we don't have to maintain this list in every target that cares about divergence?
> > We don't really have a generic definition of divergence. For CPU targets the answer would still be no
> I was hoping CPU targets wouldn't care what we put in TargetLowering::isSDNodeSourceOfDivergence because they never consume the computed divergence information.
Another idea to avoid maintaining this list of opcodes: could you return true for any MemSDNode that isAtomic() ?


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  https://reviews.llvm.org/D97392/new/

https://reviews.llvm.org/D97392