[PATCH] D97459: [CodeGen] Fix issues with subvector intrinsic index types
Fraser Cormack via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Feb 25 04:46:40 PST 2021
frasercrmck added inline comments.
================
Comment at: llvm/lib/Target/AArch64/AArch64ISelLowering.cpp:8018
/// equivalent value in the V128 register class.
static SDValue WidenVector(SDValue V64Reg, SelectionDAG &DAG) {
EVT VT = V64Reg.getValueType();
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I've just noticed that you may now be able to use `SelectionDAG::WidenVector` here? That's definitely outside the scope of this patch, though.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97459/new/
https://reviews.llvm.org/D97459
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