[llvm] 201ada8 - AArch64: relax address-space assertion in FastISel.

[Tim Northover via llvm-commits]

Author: Tim Northover
Date: 2021-02-25T10:15:55Z
New Revision: 201ada80ee15aed23728500982857ad3769f6802

URL: https://github.com/llvm/llvm-project/commit/201ada80ee15aed23728500982857ad3769f6802
DIFF: https://github.com/llvm/llvm-project/commit/201ada80ee15aed23728500982857ad3769f6802.diff

LOG: AArch64: relax address-space assertion in FastISel.

Some people are using alternative address spaces to track GC data, but
otherwise they behave exactly the same. This is the only place in the backend
we even try to care about it so it's really not achieving anything.

Added: 
    

Modified: 
    llvm/lib/Target/AArch64/AArch64FastISel.cpp

Removed: 
    


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diff  --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
index ca4705cc732a..ecc68ccda03d 100644
--- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp
+++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp
@@ -526,10 +526,7 @@ unsigned AArch64FastISel::fastMaterializeConstant(const Constant *C) {
   MVT VT = CEVT.getSimpleVT();
   // arm64_32 has 32-bit pointers held in 64-bit registers. Because of that,
   // 'null' pointers need to have a somewhat special treatment.
-  if (const auto *CPN = dyn_cast<ConstantPointerNull>(C)) {
-    (void)CPN;
-    assert(CPN->getType()->getPointerAddressSpace() == 0 &&
-           "Unexpected address space");
+  if (isa<ConstantPointerNull>(C)) {
     assert(VT == MVT::i64 && "Expected 64-bit pointers");
     return materializeInt(ConstantInt::get(Type::getInt64Ty(*Context), 0), VT);
   }