[PATCH] D97202: [RISCV] Support fixed-length vector truncates

[Fraser Cormack via Phabricator via llvm-commits]

frasercrmck updated this revision to Diff 326318.
frasercrmck added a comment.

- rebase
- regenerate tests (vsetivli)


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97202/new/

https://reviews.llvm.org/D97202

Files:
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/lib/Target/RISCV/RISCVISelLowering.h
  llvm/lib/Target/RISCV/RISCVInstrInfoVSDPatterns.td
  llvm/lib/Target/RISCV/RISCVInstrInfoVVLPatterns.td
  llvm/test/CodeGen/RISCV/rvv/fixed-vectors-int-exttrunc.ll

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