[PATCH] D80834: [AArch64] Fix CollectLOH creating an AdrpAdd LOH when there's a live used reg between the two instructions.

[Keno Fischer via llvm-commits]

I don't believe GlobalIsel is enabled. This is in debug mode, so
optimizations are enabled, but minimal. Thanks!

On Thu, Feb 25, 2021, 00:22 Amara Emerson via Phabricator <
reviews at reviews.llvm.org> wrote:

> aemerson added a comment.
>
> In D80834#2586675 <https://reviews.llvm.org/D80834#2586675>, @loladiro
> wrote:
>
> > I believe this fix is incomplete and also needs to apply adrp/add/ldr
> sequences (and maybe others). We encountered this as a miscompilation while
> porting to Apple Silicon (https://github.com/JuliaLang/julia/issues/39820
> ).
>
> I'll take a look. Are you by any chance enabling GlobalISel at all? I
> assume this is with optimizations enabled?
>
>
> Repository:
>   rG LLVM Github Monorepo
>
> CHANGES SINCE LAST ACTION
>   https://reviews.llvm.org/D80834/new/
>
> https://reviews.llvm.org/D80834
>
>
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