[PATCH] D97428: [RISCV] Add intrinsics for vlmul_ext and vlmul_trunc.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 24 17:23:23 PST 2021


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I believe the isel for these is identical to what we do for
INSERT_SUBVECTOR/EXTRACT_SUBVECTOR of scalable vectors. So
I've just lowered these directly to that.a

Though now that I've written that. Maybe we should just emit
‘llvm.experimental.vector.extract’ or ‘llvm.experimental.vector.insert’
when we process the builtin in the frontend?


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97428

Files:
  llvm/include/llvm/IR/IntrinsicsRISCV.td
  llvm/lib/Target/RISCV/RISCVISelLowering.cpp
  llvm/test/CodeGen/RISCV/rvv/vlmul.ll

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