[PATCH] D97268: [X86] Use correct padding when in 16-bit mode
James Y Knight via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Feb 24 14:50:54 PST 2021
jyknight added a comment.
Please reduce the test case per MaskRay's comment, then lg.
================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1076
unsigned X86AsmBackend::getMaximumNopSize() const {
+ if (STI.getFeatureBits()[X86::Mode16Bit])
+ return 4;
----------------
Needs to move below the FeatureNOPL stanza.
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D97268/new/
https://reviews.llvm.org/D97268
More information about the llvm-commits
mailing list