[llvm] 404843a - [MC][ARM] add .w suffixes for BL (T1) and DBG

Nick Desaulniers via llvm-commits llvm-commits at lists.llvm.org
Wed Feb 24 09:58:36 PST 2021


Author: Nick Desaulniers
Date: 2021-02-24T09:58:08-08:00
New Revision: 404843a94dbf2f9d91b9bb1dfc8608a4d7ae58c7

URL: https://github.com/llvm/llvm-project/commit/404843a94dbf2f9d91b9bb1dfc8608a4d7ae58c7
DIFF: https://github.com/llvm/llvm-project/commit/404843a94dbf2f9d91b9bb1dfc8608a4d7ae58c7.diff

LOG: [MC][ARM] add .w suffixes for BL (T1) and DBG

F1.2 Standard assembler syntax fields
describes .w and .n suffixes for wide and narrow encodings.

arch/arm/probes/kprobes/test-thumb.c tests installing kprobes for
certain instructions using inline asm.  There's a few instructions we
fail to assemble due to missing .w t2InstAliases.

Adds .w suffixes for:
* bl  (F5.1.25 BL, BLX (immediate) T1)
* dbg (F5.1.42 DBG T1)

Reviewed By: DavidSpickett

Differential Revision: https://reviews.llvm.org/D97236

Added: 
    

Modified: 
    llvm/lib/Target/ARM/ARMInstrThumb2.td
    llvm/test/MC/ARM/basic-thumb2-instructions.s
    llvm/test/MC/ARM/thumb2-branches.s

Removed: 
    


################################################################################
diff  --git a/llvm/lib/Target/ARM/ARMInstrThumb2.td b/llvm/lib/Target/ARM/ARMInstrThumb2.td
index 23758fa18ab5..6c9f6c5ca8f9 100644
--- a/llvm/lib/Target/ARM/ARMInstrThumb2.td
+++ b/llvm/lib/Target/ARM/ARMInstrThumb2.td
@@ -3967,6 +3967,8 @@ def t2BXJ : T2I<(outs), (ins GPRnopc:$func), NoItinerary, "bxj", "\t$func", []>,
   let Inst{15-0} = 0b1000111100000000;
 }
 
+def : t2InstAlias<"bl${p}.w $func", (tBL pred:$p, thumb_bl_target:$func), 0>;
+
 // Compare and branch on zero / non-zero
 let isBranch = 1, isTerminator = 1 in {
   def tCBZ  : T1I<(outs), (ins tGPR:$Rn, thumb_cb_target:$target), IIC_Br,
@@ -4064,6 +4066,7 @@ def t2DBG : T2I<(outs), (ins imm0_15:$opt), NoItinerary, "dbg", "\t$opt",
   let Inst{7-4} = 0b1111;
   let Inst{3-0} = opt;
 }
+def : t2InstAlias<"dbg${p}.w $opt", (t2DBG imm0_15:$opt, pred:$p), 0>;
 
 // Secure Monitor Call is a system instruction.
 // Option = Inst{19-16}

diff  --git a/llvm/test/MC/ARM/basic-thumb2-instructions.s b/llvm/test/MC/ARM/basic-thumb2-instructions.s
index e02b12e4a5eb..5395a0bcbef0 100644
--- a/llvm/test/MC/ARM/basic-thumb2-instructions.s
+++ b/llvm/test/MC/ARM/basic-thumb2-instructions.s
@@ -647,10 +647,16 @@ adds sp, #-4096
         dbg #5
         dbg #0
         dbg #15
+        dbg.w #0
+        it ne
+        dbgne.w #0
 
 @ CHECK: dbg	#5                      @ encoding: [0xaf,0xf3,0xf5,0x80]
 @ CHECK: dbg	#0                      @ encoding: [0xaf,0xf3,0xf0,0x80]
 @ CHECK: dbg	#15                     @ encoding: [0xaf,0xf3,0xff,0x80]
+@ CHECK: dbg	#0                      @ encoding: [0xaf,0xf3,0xf0,0x80]
+@ CHECK: it	ne                      @ encoding: [0x18,0xbf]
+@ CHECK: dbgne	#0                      @ encoding: [0xaf,0xf3,0xf0,0x80]
 
 
 @------------------------------------------------------------------------------

diff  --git a/llvm/test/MC/ARM/thumb2-branches.s b/llvm/test/MC/ARM/thumb2-branches.s
index 51f01e320d83..04c805374172 100644
--- a/llvm/test/MC/ARM/thumb2-branches.s
+++ b/llvm/test/MC/ARM/thumb2-branches.s
@@ -92,11 +92,17 @@
 @ unconditional branches accept wide suffix and encode to wide encodings
 @------------------------------------------------------------------------------
 
+         bl.w     #256
+         it ne
+         blne.w   #256
          bmi.w    #-256
          bne.w    #254
          blt.w    #-1048576
          bge.w    #1048574
 
+@ CHECK: bl	#256                    @ encoding: [0x00,0xf0,0x80,0xf8]
+@ CHECK: it	ne                      @ encoding: [0x18,0xbf]
+@ CHECK: blne	#256                    @ encoding: [0x00,0xf0,0x80,0xf8]
 @ CHECK: bmi.w	#-256                   @ encoding: [0x3f,0xf5,0x80,0xaf]
 @ CHECK: bne.w	#254                    @ encoding: [0x40,0xf0,0x7f,0x80]
 @ CHECK: blt.w	#-1048576               @ encoding: [0xc0,0xf6,0x00,0x80]


        


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