[PATCH] D97111: [RISCV] change rvv frame layout

[luxufan via Phabricator via llvm-commits]

StephenFan marked 5 inline comments as done.
StephenFan added inline comments.


================
Comment at: llvm/lib/Target/RISCV/RISCVFrameLowering.cpp:652
+      // |--------------------------| --          |-- MFI.getStackSize()
+      // | realignment              | |           |
+      // |--------------------------| --          |
----------------
rogfer01 wrote:
> In the drawing, can you put `realignment` between `callee-saved registers` and `RVV objects`?
> 
> Once we realign `sp` / `bp` as needed, we lay out the stack as if nothing happened, so the realignment if any, would act as padding below the RVV objects. As it stands now, it looks like the padding is between the scalars and the RVV objects, but this should not be the case given that the realignment is an unknown magnitude (hence the need to keep `fp` around)
> 
> I understand this means that `MFI.getStackSize()` does not account the realignment (it can't as it is unknown), perhaps we could state this somehow in the drawings? What do you think?
I Agree with you.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97111/new/

https://reviews.llvm.org/D97111