[llvm] 71a3986 - [XCOFF] add C_FILE symbol at index 0 of symbol table.
Chen Zheng via llvm-commits
llvm-commits at lists.llvm.org
Tue Feb 23 19:26:07 PST 2021
Author: Chen Zheng
Date: 2021-02-23T22:21:56-05:00
New Revision: 71a39862475e1d192d41d335452267590103acfc
URL: https://github.com/llvm/llvm-project/commit/71a39862475e1d192d41d335452267590103acfc
DIFF: https://github.com/llvm/llvm-project/commit/71a39862475e1d192d41d335452267590103acfc.diff
LOG: [XCOFF] add C_FILE symbol at index 0 of symbol table.
This is for XCOFF DWARF support.
Seems when DWARF debug is enable, symbol 0 has special usage
for AIX binder. At least, symbol 0 can not be the .text
section. Otherwise, we get some binding time error.
Add correct C_FILE symbol at index 0 here to make AIX binder
work.
Reviewed By: hubert.reinterpretcast
Differential Revision: https://reviews.llvm.org/D97117
Added:
Modified:
llvm/lib/MC/XCOFFObjectWriter.cpp
llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
llvm/test/CodeGen/PowerPC/aix-extern.ll
llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
llvm/test/CodeGen/PowerPC/aix-weak.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
Removed:
################################################################################
diff --git a/llvm/lib/MC/XCOFFObjectWriter.cpp b/llvm/lib/MC/XCOFFObjectWriter.cpp
index 031eceaadf06..15e5a437ced8 100644
--- a/llvm/lib/MC/XCOFFObjectWriter.cpp
+++ b/llvm/lib/MC/XCOFFObjectWriter.cpp
@@ -713,6 +713,30 @@ void XCOFFObjectWriter::writeRelocations() {
}
void XCOFFObjectWriter::writeSymbolTable(const MCAsmLayout &Layout) {
+ // Write symbol 0 as C_FILE.
+ // FIXME: support 64-bit C_FILE symbol.
+ //
+ // n_name. The n_name of a C_FILE symbol is the source filename when no
+ // auxiliary entries are present. The source filename is alternatively
+ // provided by an auxiliary entry, in which case the n_name of the C_FILE
+ // symbol is `.file`.
+ // FIXME: add the real source filename.
+ writeSymbolName(".file");
+ // n_value. The n_value of a C_FILE symbol is its symbol table index.
+ W.write<uint32_t>(0);
+ // n_scnum. N_DEBUG is a reserved section number for indicating a special
+ // symbolic debugging symbol.
+ W.write<int16_t>(XCOFF::ReservedSectionNum::N_DEBUG);
+ // n_type. The n_type field of a C_FILE symbol encodes the source language and
+ // CPU version info; zero indicates no info.
+ W.write<uint16_t>(0);
+ // n_sclass. The C_FILE symbol provides source file-name information,
+ // source-language ID and CPU-version ID information and some other optional
+ // infos.
+ W.write<uint8_t>(XCOFF::C_FILE);
+ // n_numaux. No aux entry for now.
+ W.write<uint8_t>(0);
+
for (const auto &Csect : UndefinedCsects) {
writeSymbolTableEntryForControlSection(
Csect, XCOFF::ReservedSectionNum::N_UNDEF, Csect.MCCsect->getStorageClass());
@@ -785,9 +809,8 @@ void XCOFFObjectWriter::finalizeSectionInfo() {
}
void XCOFFObjectWriter::assignAddressesAndIndices(const MCAsmLayout &Layout) {
- // The first symbol table entry is for the file name. We are not emitting it
- // yet, so start at index 0.
- uint32_t SymbolTableIndex = 0;
+ // The first symbol table entry (at index 0) is for the file name.
+ uint32_t SymbolTableIndex = 1;
// Calculate indices for undefined symbols.
for (auto &Csect : UndefinedCsects) {
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
index dca5fbfab6fe..f7e2fcd5d7cb 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern-weak.ll
@@ -63,6 +63,16 @@ declare extern_weak void @foo_ext_weak(i32*)
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: Index: 0
+; CHECKSYM-NEXT: Name: .file
+; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
+; CHECKSYM-NEXT: Section: N_DEBUG
+; CHECKSYM-NEXT: Source Language ID: TB_C (0x0)
+; CHECKSYM-NEXT: CPU Version ID: 0x0
+; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
+; CHECKSYM-NEXT: NumberOfAuxEntries: 0
+; CHECKSYM-NEXT: }
+; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name: .foo_ext_weak
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-extern.ll b/llvm/test/CodeGen/PowerPC/aix-extern.ll
index 085f529b0505..1ff330286a48 100644
--- a/llvm/test/CodeGen/PowerPC/aix-extern.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-extern.ll
@@ -84,6 +84,16 @@ declare i32 @bar_extern(i32*)
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: Index: 0
+; CHECKSYM-NEXT: Name: .file
+; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
+; CHECKSYM-NEXT: Section: N_DEBUG
+; CHECKSYM-NEXT: Source Language ID: TB_C (0x0)
+; CHECKSYM-NEXT: CPU Version ID: 0x0
+; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
+; CHECKSYM-NEXT: NumberOfAuxEntries: 0
+; CHECKSYM-NEXT: }
+; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name: .bar_extern
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
index f766a1b383d8..7d335198e023 100644
--- a/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-func-dsc-gen.ll
@@ -12,6 +12,16 @@ entry:
; CHECK-NEXT: Arch: powerpc
; CHECK-NEXT: AddressSize: 32bit
; CHECK: Symbol {
+; CHECK-NEXT: Index: 0
+; CHECK-NEXT: Name: .file
+; CHECK-NEXT: Value (SymbolTableIndex): 0x0
+; CHECK-NEXT: Section: N_DEBUG
+; CHECK-NEXT: Source Language ID: TB_C (0x0)
+; CHECK-NEXT: CPU Version ID: 0x0
+; CHECK-NEXT: StorageClass: C_FILE (0x67)
+; CHECK-NEXT: NumberOfAuxEntries: 0
+; CHECK-NEXT: }
+; CHECK-NEXT: Symbol {
; CHECK-NEXT: Index: [[#Index:]]
; CHECK-NEXT: Name: .text
; CHECK-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
index cc0baf5d0436..44be6c65dcc6 100644
--- a/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-llvm-intrinsic.ll
@@ -37,8 +37,18 @@ declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg)
; CHECK: .extern .memset
-; CHECKSYM: Symbol {
+; CHECKSYM: Symbol {
; CHECKSYM-NEXT: Index: 0
+; CHECKSYM-NEXT: Name: .file
+; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
+; CHECKSYM-NEXT: Section: N_DEBUG
+; CHECKSYM-NEXT: Source Language ID: TB_C (0x0)
+; CHECKSYM-NEXT: CPU Version ID: 0x0
+; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
+; CHECKSYM-NEXT: NumberOfAuxEntries: 0
+; CHECKSYM-NEXT: }
+; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: Index: 1
; CHECKSYM-NEXT: Name: .memset
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
; CHECKSYM-NEXT: Section: N_UNDEF
@@ -46,7 +56,7 @@ declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: StorageClass: C_EXT (0x2)
; CHECKSYM-NEXT: NumberOfAuxEntries: 1
; CHECKSYM-NEXT: CSECT Auxiliary Entry {
-; CHECKSYM-NEXT: Index: 1
+; CHECKSYM-NEXT: Index: 2
; CHECKSYM-NEXT: SectionLen: 0
; CHECKSYM-NEXT: ParameterHashIndex: 0x0
; CHECKSYM-NEXT: TypeChkSectNum: 0x0
@@ -58,13 +68,13 @@ declare void @llvm.memset.p0i8.i32(i8* nocapture writeonly, i8, i32, i1 immarg)
; CHECKSYM-NEXT: }
; CHECKSYM-NEXT: }
-; CHECKRELOC: 00000000 (idx: 6) .bar:
+; CHECKRELOC: 00000000 (idx: 7) .bar:
; CHECKRELOC-NEXT: 0: 7c 08 02 a6 mflr 0
; CHECKRELOC-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; CHECKRELOC-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
; CHECKRELOC-NEXT: c: 80 62 00 00 lwz 3, 0(2)
-; CHECKRELOC-NEXT: 0000000e: R_TOC (idx: 12) s[TC]
+; CHECKRELOC-NEXT: 0000000e: R_TOC (idx: 13) s[TC]
; CHECKRELOC-NEXT: 10: 80 83 00 04 lwz 4, 4(3)
; CHECKRELOC-NEXT: 14: 7c 85 23 78 mr 5, 4
; CHECKRELOC-NEXT: 18: 4b ff ff e9 bl 0x0
-; CHECKRELOC-NEXT: 00000018: R_RBR (idx: 0) .memset[PR]
+; CHECKRELOC-NEXT: 00000018: R_RBR (idx: 1) .memset[PR]
diff --git a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
index 174164b119dc..d2b5a3a3cb04 100644
--- a/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
+++ b/llvm/test/CodeGen/PowerPC/aix-overflow-toc.py
@@ -51,18 +51,18 @@
# ASM64: ld 4, L..C12289-131072(2)
# DIS32: 0: 80 82 00 00 lwz 4, 0(2)
-# DIS32: 00000002: R_TOC (idx: 24590) a0[TC]
+# DIS32: 00000002: R_TOC (idx: 24591) a0[TC]
# DIS32: c: 80 82 00 04 lwz 4, 4(2)
-# DIS32: 0000000e: R_TOC (idx: 24592) a1[TC]
+# DIS32: 0000000e: R_TOC (idx: 24593) a1[TC]
# DIS32: fffc: 80 82 7f fc lwz 4, 32764(2)
-# DIS32: 0000fffe: R_TOC (idx: 40972) a8191[TC]
+# DIS32: 0000fffe: R_TOC (idx: 40973) a8191[TC]
# DIS32: 10004: 80 82 80 00 lwz 4, -32768(2)
-# DIS32: 00010006: R_TOC (idx: 40974) a8192[TC]
+# DIS32: 00010006: R_TOC (idx: 40975) a8192[TC]
# DIS32: 1000c: 80 82 80 04 lwz 4, -32764(2)
-# DIS32: 0001000e: R_TOC (idx: 40976) a8193[TC]
+# DIS32: 0001000e: R_TOC (idx: 40977) a8193[TC]
# DIS32: 18004: 80 82 c0 00 lwz 4, -16384(2)
-# DIS32: 00018006: R_TOC (idx: 49166) a12288[TC]
+# DIS32: 00018006: R_TOC (idx: 49167) a12288[TC]
# DIS32: 1800c: 80 82 c0 04 lwz 4, -16380(2)
-# DIS32: 0001800e: R_TOC (idx: 49168) a12289[TC]
+# DIS32: 0001800e: R_TOC (idx: 49169) a12289[TC]
diff --git a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
index 5ca79db29196..b69b3760c9f4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-user-defined-memcpy.ll
@@ -48,8 +48,8 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-SYM-NEXT: StorageClass: C_EXT (0x2)
; 32-SYM-NEXT: NumberOfAuxEntries: 1
; 32-SYM-NEXT: CSECT Auxiliary Entry {
-; 32-SYM-NEXT: Index: 3
-; 32-SYM-NEXT: ContainingCsectSymbolIndex: 0
+; 32-SYM-NEXT: Index: 4
+; 32-SYM-NEXT: ContainingCsectSymbolIndex: 1
; 32-SYM-NEXT: ParameterHashIndex: 0x0
; 32-SYM-NEXT: TypeChkSectNum: 0x0
; 32-SYM-NEXT: SymbolAlignmentLog2: 0
@@ -66,7 +66,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NEXT: Section (index: 2) .data {
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x34
-; 32-REL-NEXT: Symbol: .memcpy (2)
+; 32-REL-NEXT: Symbol: .memcpy (3)
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -74,7 +74,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x38
-; 32-REL-NEXT: Symbol: TOC (10)
+; 32-REL-NEXT: Symbol: TOC (11)
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -82,7 +82,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x40
-; 32-REL-NEXT: Symbol: .call_memcpy (4)
+; 32-REL-NEXT: Symbol: .call_memcpy (5)
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
@@ -90,7 +90,7 @@ declare void @llvm.memcpy.p0i8.p0i8.i32(i8* nocapture writeonly, i8* nocapture r
; 32-REL-NEXT: }
; 32-REL-NEXT: Relocation {
; 32-REL-NEXT: Virtual Address: 0x44
-; 32-REL-NEXT: Symbol: TOC (10)
+; 32-REL-NEXT: Symbol: TOC (11)
; 32-REL-NEXT: IsSigned: No
; 32-REL-NEXT: FixupBitValue: 0
; 32-REL-NEXT: Length: 32
diff --git a/llvm/test/CodeGen/PowerPC/aix-weak.ll b/llvm/test/CodeGen/PowerPC/aix-weak.ll
index 4801fc3c1edc..f703b49fa8f1 100644
--- a/llvm/test/CodeGen/PowerPC/aix-weak.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-weak.ll
@@ -101,6 +101,16 @@ entry:
; CHECKSYM: Symbols [
; CHECKSYM-NEXT: Symbol {
+; CHECKSYM-NEXT: Index: 0
+; CHECKSYM-NEXT: Name: .file
+; CHECKSYM-NEXT: Value (SymbolTableIndex): 0x0
+; CHECKSYM-NEXT: Section: N_DEBUG
+; CHECKSYM-NEXT: Source Language ID: TB_C (0x0)
+; CHECKSYM-NEXT: CPU Version ID: 0x0
+; CHECKSYM-NEXT: StorageClass: C_FILE (0x67)
+; CHECKSYM-NEXT: NumberOfAuxEntries: 0
+; CHECKSYM-NEXT: }
+; CHECKSYM-NEXT: Symbol {
; CHECKSYM-NEXT: Index: [[#Index:]]
; CHECKSYM-NEXT: Name: .text
; CHECKSYM-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
index 87e8a7f74e62..811d63d676d4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data-sections.ll
@@ -90,50 +90,50 @@ entry:
; CHECK-NEXT: L..C3:
; CHECK-NEXT: .tc f[TC],f[RW]
-; CHECKOBJ: 00000038 (idx: 6) const_ivar[RO]:
+; CHECKOBJ: 00000038 (idx: 7) const_ivar[RO]:
; CHECKOBJ-NEXT: 38: 00 00 00 23 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000003c (idx: 8) .rodata.str1.1L...str[RO]:
+; CHECKOBJ-NEXT: 0000003c (idx: 9) .rodata.str1.1L...str[RO]:
; CHECKOBJ-NEXT: 3c: 61 62 63 64
; CHECKOBJ-NEXT: 40: 65 66 67 68
; CHECKOBJ-NEXT: 44: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .data:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000048 (idx: 10) ivar[RW]:
+; CHECKOBJ-NEXT: 00000048 (idx: 11) ivar[RW]:
; CHECKOBJ-NEXT: 48: 00 00 00 23 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000004c (idx: 12) p[RW]:
+; CHECKOBJ-NEXT: 0000004c (idx: 13) p[RW]:
; CHECKOBJ-NEXT: 4c: 00 00 00 3c <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000050 (idx: 14) foo[DS]:
+; CHECKOBJ-NEXT: 00000050 (idx: 15) foo[DS]:
; CHECKOBJ-NEXT: 50: 00 00 00 00 <unknown>
; CHECKOBJ-NEXT: 54: 00 00 00 68 <unknown>
; CHECKOBJ-NEXT: 58: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000005c (idx: 16) bar[DS]:
+; CHECKOBJ-NEXT: 0000005c (idx: 17) bar[DS]:
; CHECKOBJ-NEXT: 5c: 00 00 00 10 <unknown>
; CHECKOBJ-NEXT: 60: 00 00 00 68 <unknown>
; CHECKOBJ-NEXT: 64: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000068 (idx: 20) p[TC]:
+; CHECKOBJ-NEXT: 00000068 (idx: 21) p[TC]:
; CHECKOBJ-NEXT: 68: 00 00 00 4c <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000006c (idx: 22) ivar[TC]:
+; CHECKOBJ-NEXT: 0000006c (idx: 23) ivar[TC]:
; CHECKOBJ-NEXT: 6c: 00 00 00 48 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000070 (idx: 24) a[TC]:
+; CHECKOBJ-NEXT: 00000070 (idx: 25) a[TC]:
; CHECKOBJ-NEXT: 70: 00 00 00 78 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000074 (idx: 26) f[TC]:
+; CHECKOBJ-NEXT: 00000074 (idx: 27) f[TC]:
; CHECKOBJ-NEXT: 74: 00 00 00 7c <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .bss:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000078 (idx: 28) a[RW]:
+; CHECKOBJ-NEXT: 00000078 (idx: 29) a[RW]:
; CHECKOBJ-NEXT: ...
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000007c (idx: 30) f[RW]:
+; CHECKOBJ-NEXT: 0000007c (idx: 31) f[RW]:
; CHECKOBJ-NEXT: ...
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
index 59492f60a78f..9ae0072c9499 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-data.ll
@@ -155,7 +155,7 @@
; OBJ-NEXT: NumberOfSections: 3
; OBJ-NEXT: TimeStamp:
; OBJ-NEXT: SymbolTableOffset: 0x10C
-; OBJ-NEXT: SymbolTableEntries: 44
+; OBJ-NEXT: SymbolTableEntries: 45
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -209,7 +209,17 @@
; SYMS-NEXT: Arch: powerpc
; SYMS-NEXT: AddressSize: 32bit
; SYMS: Symbols [
-; SYMS: Symbol {
+; SYMS-NEXT: Symbol {
+; SYMS-NEXT: Index: 0
+; SYMS-NEXT: Name: .file
+; SYMS-NEXT: Value (SymbolTableIndex): 0x0
+; SYMS-NEXT: Section: N_DEBUG
+; SYMS-NEXT: Source Language ID: TB_C (0x0)
+; SYMS-NEXT: CPU Version ID: 0x0
+; SYMS-NEXT: StorageClass: C_FILE (0x67)
+; SYMS-NEXT: NumberOfAuxEntries: 0
+; SYMS-NEXT: }
+; SYMS-NEXT: Symbol {
; SYMS-NEXT: Index: [[#INDX:]]
; SYMS-NEXT: Name: .text
; SYMS-NEXT: Value (RelocatableAddress): 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
index 108c6bf3c79f..4bdac1c998ea 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-explicit-section.ll
@@ -48,7 +48,7 @@ entry:
; CHECK-NEXT: L..C1:
; CHECK-NEXT: .tc ext_zvar[TC],ext_zvar
-; CHECKOBJ: 00000000 (idx: 4) .ext_fun:
+; CHECKOBJ: 00000000 (idx: 5) .ext_fun:
; CHECKOBJ-NEXT: 0: 80 62 00 00 lwz 3, 0(2)
; CHECKOBJ-NEXT: 4: 80 82 00 04 lwz 4, 4(2)
; CHECKOBJ-NEXT: 8: 80 63 00 00 lwz 3, 0(3)
@@ -57,26 +57,26 @@ entry:
; CHECKOBJ-NEXT: 14: 38 63 00 01 addi 3, 3, 1
; CHECKOBJ-NEXT: 18: 4e 80 00 20 blr
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 0000001c (idx: 8) ext_const:
+; CHECKOBJ-NEXT: 0000001c (idx: 9) ext_const:
; CHECKOBJ-NEXT: 1c: 00 00 00 01 <unknown>
; CHECKOBJ-EMPTY:
; CHECKOBJ-NEXT: Disassembly of section .data:
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000020 (idx: 12) ext_var:
+; CHECKOBJ-NEXT: 00000020 (idx: 13) ext_var:
; CHECKOBJ-NEXT: 20: 00 00 00 01 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000024 (idx: 16) ext_zvar:
+; CHECKOBJ-NEXT: 00000024 (idx: 17) ext_zvar:
; CHECKOBJ-NEXT: 24: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000028 (idx: 18) ext_fun[DS]:
+; CHECKOBJ-NEXT: 00000028 (idx: 19) ext_fun[DS]:
; CHECKOBJ-NEXT: 28: 00 00 00 00 <unknown>
; CHECKOBJ-NEXT: 2c: 00 00 00 34 <unknown>
; CHECKOBJ-NEXT: 30: 00 00 00 00 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000034 (idx: 22) ext_var[TC]:
+; CHECKOBJ-NEXT: 00000034 (idx: 23) ext_var[TC]:
; CHECKOBJ-NEXT: 34: 00 00 00 20 <unknown>
; CHECKOBJ-EMPTY:
-; CHECKOBJ-NEXT: 00000038 (idx: 24) ext_zvar[TC]:
+; CHECKOBJ-NEXT: 00000038 (idx: 25) ext_zvar[TC]:
; CHECKOBJ-NEXT: 38: 00 00 00 24 <unknown>
; CHECKSYM: Symbol {{[{][[:space:]] *}}Index: [[#INDX:]]{{[[:space:]] *}}Name: .ext_fun_sec
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
index ad77eeb349d4..a937ba5f7bd4 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-lcomm.ll
@@ -27,7 +27,7 @@
; OBJ-NEXT: NumberOfSections: 2
; OBJ-NEXT: TimeStamp:
; OBJ-NEXT: SymbolTableOffset: 0x64
-; OBJ-NEXT: SymbolTableEntries: 8
+; OBJ-NEXT: SymbolTableEntries: 9
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
index c11bf35a763a..8313dcba13f9 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-reloc.ll
@@ -37,7 +37,7 @@ declare i32 @bar(i32)
; OBJ-NEXT: NumberOfSections: 2
; OBJ-NEXT: TimeStamp: None (0x0)
; OBJ-NEXT: SymbolTableOffset: 0x13C
-; OBJ-NEXT: SymbolTableEntries: 26
+; OBJ-NEXT: SymbolTableEntries: 27
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -79,7 +79,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Section (index: 1) .text {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x10
-; RELOC-NEXT: Symbol: .bar (0)
+; RELOC-NEXT: Symbol: .bar (1)
; RELOC-NEXT: IsSigned: Yes
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 26
@@ -87,7 +87,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1A
-; RELOC-NEXT: Symbol: globalA (22)
+; RELOC-NEXT: Symbol: globalA (23)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -95,7 +95,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x1E
-; RELOC-NEXT: Symbol: globalB (24)
+; RELOC-NEXT: Symbol: globalB (25)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 16
@@ -105,7 +105,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: Section (index: 2) .data {
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x70
-; RELOC-NEXT: Symbol: arr (14)
+; RELOC-NEXT: Symbol: arr (15)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -113,7 +113,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x74
-; RELOC-NEXT: Symbol: .foo (6)
+; RELOC-NEXT: Symbol: .foo (7)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -121,7 +121,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x78
-; RELOC-NEXT: Symbol: TOC (20)
+; RELOC-NEXT: Symbol: TOC (21)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -129,7 +129,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x80
-; RELOC-NEXT: Symbol: globalA (10)
+; RELOC-NEXT: Symbol: globalA (11)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -137,7 +137,7 @@ declare i32 @bar(i32)
; RELOC-NEXT: }
; RELOC-NEXT: Relocation {
; RELOC-NEXT: Virtual Address: 0x84
-; RELOC-NEXT: Symbol: globalB (12)
+; RELOC-NEXT: Symbol: globalB (13)
; RELOC-NEXT: IsSigned: No
; RELOC-NEXT: FixupBitValue: 0
; RELOC-NEXT: Length: 32
@@ -149,6 +149,16 @@ declare i32 @bar(i32)
; SYM: Symbols [
; SYM-NEXT: Symbol {
; SYM-NEXT: Index: 0
+; SYM-NEXT: Name: .file
+; SYM-NEXT: Value (SymbolTableIndex): 0x0
+; SYM-NEXT: Section: N_DEBUG
+; SYM-NEXT: Source Language ID: TB_C (0x0)
+; SYM-NEXT: CPU Version ID: 0x0
+; SYM-NEXT: StorageClass: C_FILE (0x67)
+; SYM-NEXT: NumberOfAuxEntries: 0
+; SYM-NEXT: }
+; SYM-NEXT: Symbol {
+; SYM-NEXT: Index: 1
; SYM-NEXT: Name: .bar
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -156,7 +166,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 1
+; SYM-NEXT: Index: 2
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -168,7 +178,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 2
+; SYM-NEXT: Index: 3
; SYM-NEXT: Name: bar
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: N_UNDEF
@@ -176,7 +186,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 3
+; SYM-NEXT: Index: 4
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -188,7 +198,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 4
+; SYM-NEXT: Index: 5
; SYM-NEXT: Name: .text
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -196,7 +206,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 5
+; SYM-NEXT: Index: 6
; SYM-NEXT: SectionLen: 64
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -208,7 +218,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 6
+; SYM-NEXT: Index: 7
; SYM-NEXT: Name: .foo
; SYM-NEXT: Value (RelocatableAddress): 0x0
; SYM-NEXT: Section: .text
@@ -216,8 +226,8 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 7
-; SYM-NEXT: ContainingCsectSymbolIndex: 4
+; SYM-NEXT: Index: 8
+; SYM-NEXT: ContainingCsectSymbolIndex: 5
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -228,7 +238,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 8
+; SYM-NEXT: Index: 9
; SYM-NEXT: Name: .data
; SYM-NEXT: Value (RelocatableAddress): 0x40
; SYM-NEXT: Section: .data
@@ -236,7 +246,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 9
+; SYM-NEXT: Index: 10
; SYM-NEXT: SectionLen: 52
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -248,7 +258,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 10
+; SYM-NEXT: Index: 11
; SYM-NEXT: Name: globalA
; SYM-NEXT: Value (RelocatableAddress): 0x40
; SYM-NEXT: Section: .data
@@ -256,8 +266,8 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 11
-; SYM-NEXT: ContainingCsectSymbolIndex: 8
+; SYM-NEXT: Index: 12
+; SYM-NEXT: ContainingCsectSymbolIndex: 9
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -268,7 +278,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 12
+; SYM-NEXT: Index: 13
; SYM-NEXT: Name: globalB
; SYM-NEXT: Value (RelocatableAddress): 0x44
; SYM-NEXT: Section: .data
@@ -276,8 +286,8 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 13
-; SYM-NEXT: ContainingCsectSymbolIndex: 8
+; SYM-NEXT: Index: 14
+; SYM-NEXT: ContainingCsectSymbolIndex: 9
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -288,7 +298,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 14
+; SYM-NEXT: Index: 15
; SYM-NEXT: Name: arr
; SYM-NEXT: Value (RelocatableAddress): 0x48
; SYM-NEXT: Section: .data
@@ -296,8 +306,8 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 15
-; SYM-NEXT: ContainingCsectSymbolIndex: 8
+; SYM-NEXT: Index: 16
+; SYM-NEXT: ContainingCsectSymbolIndex: 9
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -308,7 +318,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 16
+; SYM-NEXT: Index: 17
; SYM-NEXT: Name: p
; SYM-NEXT: Value (RelocatableAddress): 0x70
; SYM-NEXT: Section: .data
@@ -316,8 +326,8 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 17
-; SYM-NEXT: ContainingCsectSymbolIndex: 8
+; SYM-NEXT: Index: 18
+; SYM-NEXT: ContainingCsectSymbolIndex: 9
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
; SYM-NEXT: SymbolAlignmentLog2: 0
@@ -328,7 +338,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 18
+; SYM-NEXT: Index: 19
; SYM-NEXT: Name: foo
; SYM-NEXT: Value (RelocatableAddress): 0x74
; SYM-NEXT: Section: .data
@@ -336,7 +346,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_EXT (0x2)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 19
+; SYM-NEXT: Index: 20
; SYM-NEXT: SectionLen: 12
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -348,7 +358,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 20
+; SYM-NEXT: Index: 21
; SYM-NEXT: Name: TOC
; SYM-NEXT: Value (RelocatableAddress): 0x80
; SYM-NEXT: Section: .data
@@ -356,7 +366,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 21
+; SYM-NEXT: Index: 22
; SYM-NEXT: SectionLen: 0
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -368,7 +378,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 22
+; SYM-NEXT: Index: 23
; SYM-NEXT: Name: globalA
; SYM-NEXT: Value (RelocatableAddress): 0x80
; SYM-NEXT: Section: .data
@@ -376,7 +386,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 23
+; SYM-NEXT: Index: 24
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
@@ -388,7 +398,7 @@ declare i32 @bar(i32)
; SYM-NEXT: }
; SYM-NEXT: }
; SYM-NEXT: Symbol {
-; SYM-NEXT: Index: 24
+; SYM-NEXT: Index: 25
; SYM-NEXT: Name: globalB
; SYM-NEXT: Value (RelocatableAddress): 0x84
; SYM-NEXT: Section: .data
@@ -396,7 +406,7 @@ declare i32 @bar(i32)
; SYM-NEXT: StorageClass: C_HIDEXT (0x6B)
; SYM-NEXT: NumberOfAuxEntries: 1
; SYM-NEXT: CSECT Auxiliary Entry {
-; SYM-NEXT: Index: 25
+; SYM-NEXT: Index: 26
; SYM-NEXT: SectionLen: 4
; SYM-NEXT: ParameterHashIndex: 0x0
; SYM-NEXT: TypeChkSectNum: 0x0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
index 5ad88445ac1a..82244723b868 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-rodata.ll
@@ -82,7 +82,7 @@
; OBJ-NEXT: NumberOfSections: 1
; OBJ-NEXT: TimeStamp: None (0x0)
; OBJ-NEXT: SymbolTableOffset: 0x8C
-; OBJ-NEXT: SymbolTableEntries: 20
+; OBJ-NEXT: SymbolTableEntries: 21
; OBJ-NEXT: OptionalHeaderSize: 0x0
; OBJ-NEXT: Flags: 0x0
; OBJ-NEXT: }
@@ -138,7 +138,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+3]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -159,7 +159,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+5]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -180,7 +180,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+7]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -201,7 +201,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+9]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -222,7 +222,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+11]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -243,7 +243,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+13]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -264,7 +264,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+15]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
@@ -285,7 +285,7 @@
; SYMS-NEXT: NumberOfAuxEntries: 1
; SYMS-NEXT: CSECT Auxiliary Entry {
; SYMS-NEXT: Index: [[#INDX+17]]
-; SYMS-NEXT: ContainingCsectSymbolIndex: 2
+; SYMS-NEXT: ContainingCsectSymbolIndex: 3
; SYMS-NEXT: ParameterHashIndex: 0x0
; SYMS-NEXT: TypeChkSectNum: 0x0
; SYMS-NEXT: SymbolAlignmentLog2: 0
diff --git a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
index 772daa5965bb..080f01befb4b 100644
--- a/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
+++ b/llvm/test/CodeGen/PowerPC/aix-xcoff-symbol-rename.ll
@@ -105,12 +105,12 @@ declare i32 @"f\40o"(...)
; OBJ: Disassembly of section .text:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000000 (idx: 6) .f$o:
+; OBJ-NEXT: 00000000 (idx: 7) .f$o:
; OBJ-NEXT: 0: 7c 08 02 a6 mflr 0
; OBJ-NEXT: 4: 90 01 00 08 stw 0, 8(1)
; OBJ-NEXT: 8: 94 21 ff c0 stwu 1, -64(1)
; OBJ-NEXT: c: 4b ff ff f5 bl 0x0
-; OBJ-NEXT: 0000000c: R_RBR (idx: 0) .f at o[PR]
+; OBJ-NEXT: 0000000c: R_RBR (idx: 1) .f at o[PR]
; OBJ-NEXT: 10: 60 00 00 00 nop
; OBJ-NEXT: 14: 38 21 00 40 addi 1, 1, 64
; OBJ-NEXT: 18: 80 01 00 08 lwz 0, 8(1)
@@ -120,13 +120,13 @@ declare i32 @"f\40o"(...)
; OBJ-NEXT: 28: 60 00 00 00 nop
; OBJ-NEXT: 2c: 60 00 00 00 nop
; OBJ-EMPTY:
-; OBJ-NEXT: 00000030 (idx: 8) .f&o:
+; OBJ-NEXT: 00000030 (idx: 9) .f&o:
; OBJ-NEXT: 30: 7c 08 02 a6 mflr 0
; OBJ-NEXT: 34: 90 01 00 08 stw 0, 8(1)
; OBJ-NEXT: 38: 94 21 ff c0 stwu 1, -64(1)
; OBJ-NEXT: 3c: 4b ff ff c5 bl 0x0
; OBJ-NEXT: 40: 80 82 00 00 lwz 4, 0(2)
-; OBJ-NEXT: 00000042: R_TOC (idx: 24) f=o[TC]
+; OBJ-NEXT: 00000042: R_TOC (idx: 25) f=o[TC]
; OBJ-NEXT: 44: 80 84 00 00 lwz 4, 0(4)
; OBJ-NEXT: 48: 7c 63 22 14 add 3, 3, 4
; OBJ-NEXT: 4c: 38 21 00 40 addi 1, 1, 64
@@ -135,49 +135,49 @@ declare i32 @"f\40o"(...)
; OBJ-NEXT: 58: 4e 80 00 20 blr
; OBJ-NEXT: 5c: 60 00 00 00 nop
; OBJ-EMPTY:
-; OBJ-NEXT: 00000060 (idx: 10) .f&_o:
+; OBJ-NEXT: 00000060 (idx: 11) .f&_o:
; OBJ-NEXT: 60: 80 62 00 04 lwz 3, 4(2)
-; OBJ-NEXT: 00000062: R_TOC (idx: 26) f at o[TC]
+; OBJ-NEXT: 00000062: R_TOC (idx: 27) f at o[TC]
; OBJ-NEXT: 64: 4e 80 00 20 blr
; OBJ-EMPTY:
; OBJ-NEXT: Disassembly of section .data:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000068 (idx: 14) f`o:
+; OBJ-NEXT: 00000068 (idx: 15) f`o:
; OBJ-NEXT: 68: 00 00 00 0a <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 0000006c (idx: 16) f$o[DS]:
+; OBJ-NEXT: 0000006c (idx: 17) f$o[DS]:
; OBJ-NEXT: 6c: 00 00 00 00 <unknown>
-; OBJ-NEXT: 0000006c: R_POS (idx: 6) .f$o
+; OBJ-NEXT: 0000006c: R_POS (idx: 7) .f$o
; OBJ-NEXT: 70: 00 00 00 90 <unknown>
-; OBJ-NEXT: 00000070: R_POS (idx: 22) TOC[TC0]
+; OBJ-NEXT: 00000070: R_POS (idx: 23) TOC[TC0]
; OBJ-NEXT: 74: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000078 (idx: 18) f&o[DS]:
+; OBJ-NEXT: 00000078 (idx: 19) f&o[DS]:
; OBJ-NEXT: 78: 00 00 00 30 <unknown>
-; OBJ-NEXT: 00000078: R_POS (idx: 8) .f&o
+; OBJ-NEXT: 00000078: R_POS (idx: 9) .f&o
; OBJ-NEXT: 7c: 00 00 00 90 <unknown>
-; OBJ-NEXT: 0000007c: R_POS (idx: 22) TOC[TC0]
+; OBJ-NEXT: 0000007c: R_POS (idx: 23) TOC[TC0]
; OBJ-NEXT: 80: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000084 (idx: 20) f&_o[DS]:
+; OBJ-NEXT: 00000084 (idx: 21) f&_o[DS]:
; OBJ-NEXT: 84: 00 00 00 60 <unknown>
-; OBJ-NEXT: 00000084: R_POS (idx: 10) .f&_o
+; OBJ-NEXT: 00000084: R_POS (idx: 11) .f&_o
; OBJ-NEXT: 88: 00 00 00 90 <unknown>
-; OBJ-NEXT: 00000088: R_POS (idx: 22) TOC[TC0]
+; OBJ-NEXT: 00000088: R_POS (idx: 23) TOC[TC0]
; OBJ-NEXT: 8c: 00 00 00 00 <unknown>
; OBJ-EMPTY:
-; OBJ-NEXT: 00000090 (idx: 24) f=o[TC]:
+; OBJ-NEXT: 00000090 (idx: 25) f=o[TC]:
; OBJ-NEXT: 90: 00 00 00 9c <unknown>
-; OBJ-NEXT: 00000090: R_POS (idx: 30) f=o[BS]
+; OBJ-NEXT: 00000090: R_POS (idx: 31) f=o[BS]
; OBJ-EMPTY:
-; OBJ-NEXT: 00000094 (idx: 26) f at o[TC]:
+; OBJ-NEXT: 00000094 (idx: 27) f at o[TC]:
; OBJ-NEXT: 94: 00 00 00 00 <unknown>
-; OBJ-NEXT: 00000094: R_POS (idx: 2) f at o[DS]
+; OBJ-NEXT: 00000094: R_POS (idx: 3) f at o[DS]
; OBJ-EMPTY:
; OBJ-NEXT: Disassembly of section .bss:
; OBJ-EMPTY:
-; OBJ-NEXT: 00000098 (idx: 28) f"o"[RW]:
+; OBJ-NEXT: 00000098 (idx: 29) f"o"[RW]:
; OBJ-NEXT: ...
; OBJ-EMPTY:
-; OBJ-NEXT: 0000009c (idx: 30) f=o[BS]:
+; OBJ-NEXT: 0000009c (idx: 31) f=o[BS]:
; OBJ-NEXT: ...
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