[PATCH] D96351: [AIX] Enable the default AltiVec ABI on AIX

Zarko Todorovski via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 23 19:04:06 PST 2021


ZarkoCA updated this revision to Diff 325958.
ZarkoCA added a comment.

Address comments:

- split extended and default Altivec ABI tests in different files
- add a test case to check that reserved vector registers are not used even when all fprs and vector regs are clobbered


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96351/new/

https://reviews.llvm.org/D96351

Files:
  llvm/lib/Target/PowerPC/PPCISelLowering.cpp
  llvm/lib/Target/PowerPC/PPCRegisterInfo.cpp
  llvm/test/CodeGen/PowerPC/aix-csr-vector-extabi.ll
  llvm/test/CodeGen/PowerPC/aix-csr-vector.ll
  llvm/test/CodeGen/PowerPC/aix-vec-abi.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D96351.325958.patch
Type: text/x-patch
Size: 50759 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20210224/0f8e0d1f/attachment.bin>


More information about the llvm-commits mailing list