[PATCH] D97268: [X86] Use correct padding when in 16-bit mode

[Fangrui Song via Phabricator via llvm-commits]

MaskRay added inline comments.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1075
 
 unsigned X86AsmBackend::getMaximumNopSize() const {
   if (!STI.hasFeature(X86::FeatureNOPL) && !STI.hasFeature(X86::Mode64Bit))
----------------
jyknight wrote:
> I think we could just return 1 in 16-bit mode. There's no real reason to do nop-optimization in that mode, is there? Then the rest of the patch isn't necessary.
> 
I agree that performance in 16-bit mode is not important. We can just return 1 :)


================
Comment at: llvm/test/MC/X86/code16gcc-align.s:25
+print_serial:
+	pushl	%ebp
+	movl	%esp, %ebp
----------------
The input contains many instructions that are not checked. They should just be replaced by `.nops number`.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97268/new/

https://reviews.llvm.org/D97268