[PATCH] D97268: [X86] Use correct padding when in 16-bit mode

[Craig Topper via Phabricator via llvm-commits]

craig.topper added inline comments.


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1122
+        "\x90",
+        // xchg %ax,%ax
+        "\x66\x90",
----------------
Isn't this xchg %eax, %eax since 0x66 would override the register to 32-bit in 16-bit mode?


================
Comment at: llvm/lib/Target/X86/MCTargetDesc/X86AsmBackend.cpp:1124
+        "\x66\x90",
+        // lea 0(%esi),%esi
+        "\x8d\x74\x00",
----------------
Should these %esi's be %si like the ones below?


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D97268/new/

https://reviews.llvm.org/D97268