[PATCH] D95432: AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect

Petar Avramovic via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Feb 23 07:38:36 PST 2021


Petar.Avramovic updated this revision to Diff 325790.
Petar.Avramovic retitled this revision from "AMDGPU/GlobalISel: Combine uniform icmp" to "AMDGPU/GlobalISel: Combine zext(trunc x) to x after RegBankSelect".
Petar.Avramovic edited the summary of this revision.
Petar.Avramovic added a comment.

Dropping icmp move for from this patch. Leaving zext_trunc_fold. 
Zext is selected into AND with 1. zext_trunc_fold results in getting rid of the SCC copies when zext was the only instruction between icmp and select/branch.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D95432/new/

https://reviews.llvm.org/D95432

Files:
  llvm/lib/Target/AMDGPU/AMDGPUCombine.td
  llvm/lib/Target/AMDGPU/AMDGPURegBankCombiner.cpp
  llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp
  llvm/test/CodeGen/AMDGPU/GlobalISel/divergent-control-flow.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i32.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.end.cf.i64.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.private.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.is.shared.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.set.inactive.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/non-entry-alloca.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/saddsat.ll
  llvm/test/CodeGen/AMDGPU/GlobalISel/ssubsat.ll

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