[llvm] 5207151 - [SLP][Test] Add test for PR49081.ll

[Anton Afanasyev via llvm-commits]

Author: Anton Afanasyev
Date: 2021-02-23T09:37:42+03:00
New Revision: 5207151cf6527425f509db5a0f18fa97f678ff3e

URL: https://github.com/llvm/llvm-project/commit/5207151cf6527425f509db5a0f18fa97f678ff3e
DIFF: https://github.com/llvm/llvm-project/commit/5207151cf6527425f509db5a0f18fa97f678ff3e.diff

LOG: [SLP][Test] Add test for PR49081.ll

Added: 
    llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll

Modified: 
    

Removed: 
    


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diff  --git a/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll b/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
new file mode 100644
index 000000000000..6db7f4d6ad79
--- /dev/null
+++ b/llvm/test/Transforms/SLPVectorizer/X86/pr49081.ll
@@ -0,0 +1,31 @@
+; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
+; RUN: opt -slp-vectorizer -instcombine -S < %s | FileCheck %s
+; These conversions should be vectorized by reviews.llvm.org/D57059
+
+define dso_local <4 x float> @foo(<4 x i32> %0) {
+; CHECK-LABEL: @foo(
+; CHECK-NEXT:    [[TMP2:%.*]] = extractelement <4 x i32> [[TMP0:%.*]], i32 1
+; CHECK-NEXT:    [[TMP3:%.*]] = sitofp i32 [[TMP2]] to float
+; CHECK-NEXT:    [[TMP4:%.*]] = insertelement <4 x float> undef, float [[TMP3]], i32 0
+; CHECK-NEXT:    [[TMP5:%.*]] = insertelement <4 x float> [[TMP4]], float [[TMP3]], i32 1
+; CHECK-NEXT:    [[TMP6:%.*]] = extractelement <4 x i32> [[TMP0]], i32 2
+; CHECK-NEXT:    [[TMP7:%.*]] = sitofp i32 [[TMP6]] to float
+; CHECK-NEXT:    [[TMP8:%.*]] = insertelement <4 x float> [[TMP5]], float [[TMP7]], i32 2
+; CHECK-NEXT:    [[TMP9:%.*]] = extractelement <4 x i32> [[TMP0]], i32 3
+; CHECK-NEXT:    [[TMP10:%.*]] = sitofp i32 [[TMP9]] to float
+; CHECK-NEXT:    [[TMP11:%.*]] = insertelement <4 x float> [[TMP8]], float [[TMP10]], i32 3
+; CHECK-NEXT:    ret <4 x float> [[TMP11]]
+;
+  %2 = extractelement <4 x i32> %0, i32 1
+  %3 = sitofp i32 %2 to float
+  %4 = insertelement <4 x float> undef, float %3, i32 0
+  %5 = insertelement <4 x float> %4, float %3, i32 1
+  %6 = extractelement <4 x i32> %0, i32 2
+  %7 = sitofp i32 %6 to float
+  %8 = insertelement <4 x float> %5, float %7, i32 2
+  %9 = extractelement <4 x i32> %0, i32 3
+  %10 = sitofp i32 %9 to float
+  %11 = insertelement <4 x float> %8, float %10, i32 3
+  ret <4 x float> %11
+}
+