[PATCH] D96980: [amdgpu] Revert agnostic SGPR spill.

[Carl Ritson via Phabricator via llvm-commits]

critson added inline comments.


================
Comment at: llvm/lib/Target/AMDGPU/SIInstrInfo.cpp:3302-3315
+  switch (Opcode) {
+  // As SGPR reload is lowered finally using V_READFIRSTLANE_B32, we should
+  // avoid executing them when EXEC = 0 as well.
+  case AMDGPU::SI_SPILL_S32_RESTORE:
+  case AMDGPU::SI_SPILL_S64_RESTORE:
+  case AMDGPU::SI_SPILL_S96_RESTORE:
+  case AMDGPU::SI_SPILL_S128_RESTORE:
----------------
ruiling wrote:
> I don't think we need this, these instructions have already been lowered to v_readfirstlane when we try to optimize off the skip-jump.
True if these have already been lowered then this code will have no additional effect.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D96980/new/

https://reviews.llvm.org/D96980