[PATCH] D96517: [AMDGPU] Optimize SGPR to scratch spilling

[Michael Liao via Phabricator via llvm-commits]

hliao added a comment.

In D96517#2578930 <https://reviews.llvm.org/D96517#2578930>, @sebastian-ne wrote:

> In D96517#2578884 <https://reviews.llvm.org/D96517#2578884>, @hliao wrote:
>
>> why exec mask = 0 case is a valid one, won't we already branch away once exec mask goes to zero?
>
> That is the question it comes down to. If it is guaranteed that exec is never 0, i.e. at least one bit is always set, I’m in favor of your patch.
>
> To have some numbers, I saw some functions spilling 30 SGPRs to scratch, so it can be more than just a one or two.

I had updated D96980 <https://reviews.llvm.org/D96980> to mark SI_SPILL_<n>_RESTORE having unwanted effect so that the optimization won't generate code with SGPR reload with 0 exec mask.


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https://reviews.llvm.org/D96517