[PATCH] D97219: [LSR] Unify scheduling of existing and inserted addrecs

[Philip Reames via Phabricator via llvm-commits]

reames created this revision.
reames added reviewers: mkazantsev, SjoerdMeijer, Weiwei-2021, greened, fhahn.
Herald added subscribers: dantrushin, jfb, hiraditya, mcrosier.
Herald added a reviewer: bollu.
reames requested review of this revision.
Herald added a project: LLVM.

LSR goes to some lengths to schedule IV increments such that %iv and %iv.next never need to overlap.  This is fairly fundamental to LSRs cost model.  LSR assumes that an addrec can be represented with a single register.  If %iv and %iv.next have to overlap, then that assumption does not hold.

The bug - which this patch is fixing - is that LSR only does this scheduling for IVs which it inserts, but it's cost model assumes the same for existing IVs that it reuses.  It will rewrite existing IV users such that the no-overlap property holds, but will not actually reschedule said IV increment.

As you can see from the relatively lack of test updates, this doesn't actually impact codegen much.  The main reason for doing it is to make a follow up patch series which improves post-increment use and scheduling easier to follow.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D97219

Files:
  llvm/lib/Transforms/Scalar/LoopStrengthReduce.cpp
  llvm/test/Transforms/LoopStrengthReduce/post-increment-insertion.ll

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